U.S. researchers have unveiled the world’s smallest transistor reported to date, combining a new mix of materials, which makes even the tiniest silicon-based transistor appear ginormous in comparison.

The team, led by the U.S. Department of Energy’s Lawrence Berkeley National Laboratory, designed the minuscule transistor with a working one-nanometre gate – far surpassing any industry expectation for reducing transistor sizes. In the scientific study, MoS2 transistors with 1-nanometer gate lengths, published today in the journal Science, the researchers describe a prototype device which uses a novel semiconductor material known as transition metal dichalcogenides (TMDs).

The transistor structure uses a single-walled carbon nanotube as the gate electrode and molybdenum disulfide (MoS2) for the channel material, rather than silicon.

‘The semiconductor industry has long assumed that any gate below 5 nanometers wouldn’t work, so anything below that was not even considered,’ explained study lead Sujay Desai.

transistor_schematic670‘This research shows that sub-5-nanometre gates should not be discounted. Industry has been squeezing every last bit of capability out of silicon. By changing the material from silicon to MoS2, we can make a transistor with a gate that is just 1 nanometer in length, and operate it like a switch,’ he added.

For comparison, a piece of paper is about 100,000 nanometres thick.

As a current flows through a transistor, the stream of electrons travels within a channel and is controlled by gates – which are able to turn the flow on and off in a split second. The best transistors currently available on the market have a functional gate length in excess of 10 nanometres.

One of the major challenges in reducing the size of a gate in a transistor had been that smaller designs led to unacceptable leakage current when the device was supposed to be switched off. However, the new prototype displayed over two orders of magnitude reduction in leakage when compared to silicon alternatives – resulting in a significant boost in power efficiency.

While previous size limits placed restrictions on the number of transistors that could be placed on a semiconductor circuit, the new configuration breakthrough means that it should also be possible to significantly reduce the size of computer chips and boost processor speeds.

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